This topic only applies to IA-32 architecture targeting Intel® Graphics Technology. Intel® Graphics Technology is a preview feature.
Take the following into consideration with regard to accessing memory:
Scalar memory accesses on Intel® Graphics Technology are comparatively less efficient than on the host CPU, so you should avoid them.
Vectorized memory accesses are reasonably efficient.
Gather/scatter memory accesses of 4-byte elements, such as
intandfloat, are efficient on the target, where bandwidth depends only on the number of cache lines touched by a gather/scatter memory operation. Gather/scatter memory operations of 1-byte and 2-byte element vectors are relatively inefficient because they read a small amount of data per single instruction sequence. But the compiler is able to convert reads of continuous vectors of 1-byte and 2-byte elements to efficiently block reads if sufficient alignment information is available to the compiler.In most cases, you should use contiguous reads to avoid gather/scatter operations of 1-byte or 2-byte elements from global memory, such as pre-loading data to local arrays or vectorized 4-byte variables.
Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 |